Research into communication systems using the spread spectrum technique have been carried out in earnest because those systems, which convert communication data with narrow bands into signals with wide bands by using the binary code sequence P(t) called PN (Pseudo-Noise) codes so as to transmit the resulting signals, have a higher efficiency in frequency usage and are capable of masking the presence and absence of communication and the contents of the communication more easily, as compared with other communication systems such as TDMA (Time Division Multiple Access) systems and FDMA (Frequency Division Multiple Access) systems. With respect to a demodulation system for the spread-spectrum communication systems, the application of matched filters has been studied in order to carry out the synchronism acquisition and despreading between received signals and the binary spread code sequence P(t) at high speeds.
Referring to FIG. 18, a brief explanation will be given of a conventional matched filter. The matched filter of FIG. 18 is a matched filter for carrying out correlation operations with m taps, and is provided with "m" number of sample-hold circuits 510 that are connected in cascade and that functions as a delay means. An analog signal Vin is applied to the sample-hold circuit 510 at the front-most step, and the sample-hold circuits 510 at the respective steps repeat sampling and holding for each input clock CLK. Thus, the sample-hold circuits 510 output an analog signal Vin that has been sampled in different synchronized timing with an input clock period Tc.
The analog signal Vin and the outputs of the respective sample-hold circuits 510 are applied to either an addition-related adder 507 or a subtraction-related adder 508 through switches 505. Here, it has been predetermined in accordance with the binary code sequence P(t) which of the respective adders 507 and 508 is selected by the switches 505. Further, a subtracter 509 subtracts the output of the subtraction-related adder 508 from the output of the addition-related adder 507, and outputs the result as a correlation output.
The correlation output in question has a peak value when the binary code sequence P(t) of the received signal and the binary code sequence P(t) of the matched filter are synchronous to each other; therefore, it is utilized for synchronism acquisition and despreading of the demodulation system.
Here, the conventional sample-hold circuits 510 are constituted by inversion amplifiers having ac-coupling capacitors at their inputs, and designed to continuously release the input voltage Vin at the time of cutoff of the input terminal. As illustrated in FIG. 19, in each inversion amplifier 520, a first-step inverter 527, a middle-step inverter 528 and an output-step inverter 529, and a high open-loop gain is obtained by cascade-connecting these inverters 527, 528 and 529.
However, the application of feedback to the amplifier having such a high gain with a great through-rate causes a problem of oscillations. Therefore, in order to prevent the oscillations, a resistor 531 is placed between the output of the middle-step inverter 528 and the power source Vcc, and a resistor 532 is placed between the output of the middle-step inverter 528 and ground. The application of the two balanced resistors 531 and 532 makes it possible to adjust the gain properly. Further, a capacitor 533 is placed between the output and ground so as to suppress the gain within the oscillation frequency bands. The combination of these resistors 531 and 532 and capacitor 533 prevents the inversion amplifier 520 from oscillating.
Moreover, the inversion amplifier 520 prevents an increase in power consumption due to dc currents by using an ac-coupling capacitor 525 at its input. Here, the closed-loop gain of the inversion amplifier 520 is represented by a capacitance ratio between the input capacitor 525 and a feed-back capacitor 526, since the open-loop gain is sufficiently large.
However, in the above-mentioned conventional inversion amplifier 520, since the input of the inverter serves as the gate of the MOS transistor, the connecting point 530 between the input capacitor 525 and the first-step inverter 527 is maintained in a floating state on a dc basis. The resulting problem is that since the initial charge is not controlled at the connecting point 530, the operation point is not determined in the inversion amplifier 520.
Therefore, when the inversion amplifiers 520 of this type are used in the sample-hold circuits 510 in a matched filter, the outputs of the multiple sample-hold circuits 510 that are used in the matched filter are subject to errors, because of offsets of the operation point of the individual inversion amplifiers 520. The resulting problem is degradation of the precision of the correlation output of the matched filter.